Oh my, they are implementing QPI in the FPGA? That's actually pretty cool; it gives you a fully coherent memory interface. QPI is much faster than the FPGA, though, so they probably have a slower wider interface unit of some sort that the FPGA talks to. But it also means you get a really fast interface to memory. That sounds like a lot of fun! (But scary; you can probably really mess up the system by botching the coherence protocol in some subtle ways.) -tom On Mon, Jun 23, 2014 at 3:32 PM, James Cloos <cloos@jhcloos.com> wrote:
"TK" == Tom Knight <tk@ginkgobioworks.com> writes:
TK> If you check these patents, you’ll see that we envisioned the FPGA TK> logic having direct read/write access to the processor register TK> files. This would allow an easy single cycle instruction of the kind TK> you envision. Intel probably didn’t do this, although there is nothing TK> difficult about it. TK> US 5,742,180 and US 6,052,773
The reports I read said that all they are doing is putting an existing fpga chip in the package with their xeon chip, with the two communicating over the same bus multi-socket xeons use between themselves.
-JimC -- James Cloos <cloos@jhcloos.com> OpenPGP: 0x997A9F17ED7DAEA6
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